1. Field of the Invention
This invention relates generally to electronic devices for testing and burning-in integrated circuits and, more particularly, to a multiple-chip probe assembly for use in a wafer test and burn-in system.
2. Discussion of the Related Art
Electronic integrated circuitry is burned-in under extreme conditions of temperature and voltage after manufacture in order to exaggerate the failure rate of defective circuitry while ensuring greater reliability of the circuitry which survives the stressful conditions. Because the rate of electronic component failure is significantly higher during the early life of a component, testing under stressful conditions is an effective method of identifying integrated circuit chips which would likely experience early failure in the field.
Systems for burning-in individual integrated circuit chips are available but expensive and difficult to make. Burn-in would be best accomplished while the individual circuits reside on their respective wafers before dicing into individual chips. Such a method of wafer-level burn-in has long been sought in the industry. As described in commonly assigned U.S. Pat. No. 5,600,257, entitled SEMI-CONDUCTOR WAFER TEST AND BURN-IN, problems with wafer level burn-in include alignment of test probes and thermal matching. As for probe alignment, each of the integrated circuits on the wafer has contact points on the surface of the wafer which must be contacted by a particular probe element of a multi-probe element test head assembly. The diminutive size of the test contact points requires that the probe elements of the test head assembly be of an appropriately small size, and further that the test head probe elements be precisely aligned with the test contact points on the integrated circuits undergoing the test.
The precise alignment between the probe elements of the test head assembly and the test contact points on the integrated circuits is difficult to maintain over the temperature range utilized during burn-in, for example, at temperatures between about 100.degree. C. to 160.degree. C. Probe elements, for example, may include cobra probes, such as described in commonly assigned U.S. Pat. No. 4,027,925 to Byrnes et al., entitled CONTACT FOR AN ELECTRICAL CONTACTOR ASSEMBLY. Heating of the wafer, which is typically comprised of silicon, results in expansion (in all three axes X,Y,Z) which cause problems due to the diminutive size of the test contact points on the integrated circuits of the wafer. The probe elements can also be affected. As a result, the probe elements of the test head assembly may become misaligned with respect to these test contact points to such an extent that the probe elements no longer contact the test contact points. Maintaining contact is of critical importance in most aspects of testing and burn-in.
As described in the '257 patent, the problem has been solved by providing the test head assembly with a material possessing the same or similar thermal expansion coefficient as that of silicon. At the same time, the test head assembly must provide means to effectively and accurately position the probe elements so that proper initial contact may be made and maintained with the test contact points on the integrated circuits being tested.
In addition to the above, contacting probe systems for wafer test currently permit contact of 1 to 16 chip sites of a wafer under test at a single time. As a result, multiple probings are required to test all of the chip sites of the wafer.
It is thus desirable to provide an improved probe assembly for testing the chip sites of an entire wafer at a single time during testing, and to provide a method of constructing the probe assembly.